LeoCore-1 – offering low-cost programmable baseband solution for multimode wireless communication with complete development package
September 7, 2006 (Press Release) --
Linköping, Sweden: Coresonic AB, a leading provider of baseband processor technology, today announced the LeoCore-1 Programmable Baseband Processor SIP Core. With a new type of processor architecture, Coresonic has developed a programmable baseband that revolutionizes the communication industry. The LeoCore technology enables the developers of communication semiconductors to build more flexible solutions with less silicon area than fixed-function solutions. Coresonic licenses the technology as a Silicon Intellectual Property (SIP) Core thereby enabling communication semiconductor vendors and module developers to implement this powerful technology in their designs.
“After years of research we have presented an architecture that achieves the best of two worlds, the flexibility of a programmable processor with the low cost and low power consumption of a fixed-function ASIC”, says Dr. Dake Liu, CTO and Co-founder of Coresonic. “This technology is truly a revolution for the industry.”
Coresonic today also released the Coresonic Developer Studio, a fully-fledged software development package that enables the designers to quickly acquaint themselves and develop with the LeoCore architecture.
Enabling unparalleled flexibilty
The flexibility of the LeoCore technology makes it a great solution of a wide variety of wireless communication applications, including cellular handsets and modems for laptops and PDAs. LeoCore-1 supports WLAN standards 802.11 a/b/g, GSM/GPRS/EDGE, Bluetooth 1 and EDR, WiMAX and DVB-T.
Apart from enabling multimode devices, the flexibility of the LeoCore technology also shortens time-to-market for the customers who can integrate the LeoCore SIP Core and develop software in the matter of months. The technology further eases maintenance with the capability of firmware upgrades instead of hardware changes. Firmware upgrades also allows for longer product life-times.
"Data-rate and mobility tradeoffs and different standards like 2G, 3G, Bluetooth, WLAN, GPS and digital-video broadcasting, are leading to multimode requirements, and topics such as the coexistence of different technologies must be solved. One crucial element for such a platform is a low power programmable modem processor", says Prof Dr Hermann Eul, President of Communication Solutions Group, Infineon Technologies.
Breakthrough Architecture
The Coresonic LeoCore technology is based on a breakthrough processor architecture called SIMT (Single Instruction stream Multiple Tasks). The architecture allows parallel tasks to be controlled by a single instruction flow, achieving a large degree of parallelism while reducing both hardware- and programming complexity compared to other parallel architectures. Compared to VLIW-SIMD architectures the same performance is reached with much smaller program size and simpler control hardware.
Coresonic combines the revolutionary SIMT principle with an instruction set optimized for baseband processing.
“After years of research we have presented an architecture that achieves the best of two worlds, the flexibility of a programmable processor with the low cost and low power consumption of a fixed-function ASIC”, says Dr. Dake Liu, CTO and Co-founder of Coresonic. “This technology is truly a revolution for the industry.”
Coresonic today also released the Coresonic Developer Studio, a fully-fledged software development package that enables the designers to quickly acquaint themselves and develop with the LeoCore architecture.
Enabling unparalleled flexibilty
The flexibility of the LeoCore technology makes it a great solution of a wide variety of wireless communication applications, including cellular handsets and modems for laptops and PDAs. LeoCore-1 supports WLAN standards 802.11 a/b/g, GSM/GPRS/EDGE, Bluetooth 1 and EDR, WiMAX and DVB-T.
Apart from enabling multimode devices, the flexibility of the LeoCore technology also shortens time-to-market for the customers who can integrate the LeoCore SIP Core and develop software in the matter of months. The technology further eases maintenance with the capability of firmware upgrades instead of hardware changes. Firmware upgrades also allows for longer product life-times.
"Data-rate and mobility tradeoffs and different standards like 2G, 3G, Bluetooth, WLAN, GPS and digital-video broadcasting, are leading to multimode requirements, and topics such as the coexistence of different technologies must be solved. One crucial element for such a platform is a low power programmable modem processor", says Prof Dr Hermann Eul, President of Communication Solutions Group, Infineon Technologies.
Breakthrough Architecture
The Coresonic LeoCore technology is based on a breakthrough processor architecture called SIMT (Single Instruction stream Multiple Tasks). The architecture allows parallel tasks to be controlled by a single instruction flow, achieving a large degree of parallelism while reducing both hardware- and programming complexity compared to other parallel architectures. Compared to VLIW-SIMD architectures the same performance is reached with much smaller program size and simpler control hardware.
Coresonic combines the revolutionary SIMT principle with an instruction set optimized for baseband processing.
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